آی سی ایپرام M35160

M35080 8 Kbit Serial SPI Bus EEPROM With Incremental Registers PRELIMINARY DATA s Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes) Single Supply Voltage: 4.5 V to 5.5 V 5 MHz Clock Rate (maximum) Sixteen 16-bit Incremental Registers BYTE and PAGE WRITE (up to 32 Bytes) (except for the Incremental Registers) Self-Timed Programming Cycle Hardware Protection of the Status Register Resizeable Read-Only EEPROM Area Enhanced ESD Protection 1 Million Erase/Write Cycles (minimum) 40 Year Data Retention (minimum) s s s s 8 1 PSDIP8 (BN) 0.25 mm frame s s s s s s 8 1 SO8 (MN) 150 mil width DESCRIPTION The M35080 device consists of 1024×8 bits of low power EEPROM, fabricated with STMicroelectronics’ proprietary High Endurance Double Polysilicon CMOS technology. The device is accessed by a simple SPI-compatible serial interface. The bus signals consist of a serial clock input (C), a serial data input (D) and a serial data output (Q), as shown in Table 1. The device is selected when the chip select input (S) is held low. Data is clocked in during the low to high transition of the clock, C. Data is clocked out during the high to low transition of the clock. Figure 1. Logic Diagram VCC Table 1. Signal Names C D Q S W VCC VSS Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect Supply Voltage Ground D C M35080 S W Q VSS AI02143 June 1999 This is preliminary information on a new product now in development or undergoing evaluation